1. Field of the Invention
The present invention relates to a plating apparatus, and more particularly to an electrode structure in a plating apparatus for plating a substrate such as a semiconductor wafer. The present invention also relates to a method of forming a conductive film on a substrate such as a semiconductor wafer.
2. Description of the Related Art
As semiconductor devices have become more highly integrated in recent years, circuit interconnections have become finer and distances between those circuit interconnections have become smaller. In the case of photolithography, which can form interconnections that are at most 0.5 μm wide, it is required that surfaces on which pattern images are to be focused by a stepper should be as flat as possible because the depth of focus of an optical system is relatively small. In order to planarize such a semiconductor wafer, there has been used a polishing apparatus for performing chemical mechanical polishing (CMP).
Prior to the CMP process, a metal plating process such as a copper plating process is performed to fill metal into fine interconnection grooves or recesses formed in a surface of a semiconductor wafer. At that time, it is important to form a plated film having uniform thickness. FIG. 1 shows a conventional plating apparatus 1 which can form a plated film having uniform thickness on a semiconductor device for LSI, which has fine interconnections having a multilayer structure.
The conventional plating apparatus 1 shown in FIG. 1 is used to deposit a copper film on a seed layer 2 formed on an upper surface of a substrate such as a semiconductor wafer 3 by electrolytic plating. As shown in FIG. 1, the plating apparatus 1 has a wafer chuck 4 for chucking the semiconductor wafer 3 in a state such that the semiconductor wafer 3 faces upward, a plating cup 5 which covers the semiconductor wafer 3 so that an open end of the plating cup 5 is closed by the semiconductor wafer 3, a seal member 6 for sealing the semiconductor wafer 3 and the plating cup 5, and a counter electrode 7 disposed so as to face the semiconductor wafer 3. The counter electrode 7 is spaced from the semiconductor wafer 3 at a predetermined distance. The plating apparatus 1 includes a power source 8 for supplying current to the semiconductor wafer 3 and the counter electrode 7 so that the seed layer 2 of the semiconductor wafer 3 serves as a cathode while the counter electrode 7 serves as an anode. The open end of the plating cup 5 is closed by the semiconductor wafer 3, and an electrolytic plating solution 9 is supplied to the interior of the plating cup 5. The semiconductor wafer 3 and the counter electrode 7 are electrically connected via the electrolytic plating solution 9 in the plating cup 5 to thereby form a copper film on the seed layer 2 of the semiconductor wafer 3. In the conventional plating apparatus 1, current is supplied to the semiconductor wafer 3 via a mechanical contact with a conductive portion (seed layer) of the semiconductor wafer 3.
The conventional plating apparatus 1 as shown in FIG. 1 requires a large amount of electrolytic plating solution to plate a substrate such as a semiconductor wafer. Thus, the conventional plating apparatus 1 is uneconomical even though it can form a plated film having uniform thickness. Recently, there has been proposed a plating apparatus which can avoid wasteful use of an electrolytic plating solution. FIG. 2 shows such a plating apparatus 11 which can reduce the amount of electrolytic plating solution to be used.
As shown in FIG. 2, the plating apparatus 11 includes a frame (wafer seal) 12 positioned on a peripheral portion of a semiconductor wafer 3, which has a seed layer formed on an upper surface thereof. The semiconductor wafer 3 is disposed so that the seed layer faces upward. The frame 12 is formed by a seal member 13 made of synthetic rubber or synthetic resin having elasticity and chemical resistance. Thus, the frame 12 has a sealing capability. Accordingly, the frame 12 and the semiconductor wafer 3 define a plating bath in the form of a flat dish for holding an electrolytic plating solution 9 therein. The plating apparatus 11 also includes an immersion member 14 which is immersed in the electrolytic plating solution 9 held in the plating bath, a holder 15 for holding the immersion member 14 so as to immerse the immersion member 14 in the electrolytic plating solution 9, a shield rubber ring 16 interposed between the immersion member 14 and the holder 15, and a counter electrode 17 disposed on an upper surface of the immersion member 14. The immersion member 14 is used to increase an electrical resistance between the semiconductor wafer 3 and the counter electrode 17 for uniform plating. The counter electrode 17 is spaced from the semiconductor wafer 3 at a predetermined distance so as to be in parallel to a surface of the semiconductor wafer 3. It is desirable to bring the counter electrode 17 into close contact with the upper surface of the immersion member 14.
The plating apparatus 11 has a feed contact 18 for supplying current from a power source to the seed layer (conductive portion) of the semiconductor wafer 3. The feed contact 18 is positioned outside of a packing portion 19 of the frame 12 and brought into contact with a peripheral portion of the semiconductor wafer 3 which extends outward from the packing portion 19 of the frame 12. Thus, the conductive portion (seed layer) of the semiconductor wafer 3 and the feed contact 18 are electrically connected to each other. The packing portion 19 of the frame 12 has a tip end which is pressed against the surface of the semiconductor wafer 3 and brought into close contact with the surface of the semiconductor wafer 3. Thus, the frame 12 serves to prevent the electrolytic plating solution 9 from leaking out of the packing portion 19 of the frame 12. Accordingly, the feed contact 18 is prevented from being exposed to the electrolytic plating solution 9.
In the plating apparatus 11 shown in FIG. 2, the immersion member 14 is formed of non-conductive open-cell foam. Accordingly, the immersion member 14 has a large number of fine passages in the foam, into which a plating solution is introduced. Thus, fine current paths are formed in the immersion member 14 so that the immersion member 14 has a high resistivity.
One of reasons why the immersion member 14 is interposed between the counter electrode 17 and the semiconductor wafer 3 is to reduce the amount of electrolytic plating solution to be used. However, a primary reason for the above is to increase an electrical resistance so as to form a plated film having uniform thickness on the substrate (semiconductor wafer) 3.
Specifically, in a case of a low electrical resistance between the counter electrode (anode) 17 and the semiconductor wafer 3, current is concentrated near the feed contact 18 on the peripheral portion of the semiconductor wafer 3 because the seed layer formed on the semiconductor wafer 3 has a high electrical resistance. Accordingly, a resistor (i.e., immersion member) having an electrical resistance higher than the seed layer of the semiconductor wafer 3 should be interposed between the counter electrode 17 and the semiconductor wafer 3 to form a plated film having uniform thickness.
However, when the frame 12 is formed by the non-conductive seal member 13, electric fields are still concentrated near the feed contact 18 on the peripheral portion of the semiconductor wafer 3 as shown by arrows in FIG. 2 even if the immersion member 14 having a high resistivity is interposed between the counter electrode 17 and the semiconductor wafer 3. Accordingly, a plated film having uneven thickness is formed on the semiconductor wafer 3.
According to the plating apparatus shown in FIG. 2, the immersion member 14 is immersed in the electrolytic plating solution 9 by the holder 15 to increase an electrical resistance between the counter electrode 17 and the semiconductor wafer 3. Thus, it is possible to form a plated film having uniform thickness on the semiconductor wafer 3 and considerably reduce the amount of electrolytic plating solution to be used as compared to the conventional plating apparatus 1 shown in FIG. 1. However, since the peripheral portion of the semiconductor wafer 3 extends outward from the packing portion 19 of the frame 12 as seen from FIG. 2, the electrolytic plating solution 9 is not brought into contact with the peripheral portion of the semiconductor wafer 3. Thus, an area of the semiconductor wafer 3 to be plated becomes small.
Additionally, the diameter of the immersion member 14 is considerably smaller than that of the semiconductor wafer 3. Accordingly, an area of the semiconductor wafer 3 on which the electrolytic plating solution 9 is present inside of the packing portion 19 of the frame 12 includes an inner area above which the counter electrode 17 is present and an outer area above which the counter electrode 17 is not present. At that time, the outer area of the semiconductor wafer 3 is likely to be insufficiently plated. Thus, an effective area of the semiconductor wafer 3 to be plated becomes small.
According to the conventional plating apparatus 1 using no immersion member, as shown in FIG. 1, a current density is not uniform on the semiconductor wafer 3 because of a long distance between the semiconductor wafer 3 and the counter electrode 7. According to the improved conventional plating apparatus 11 having the immersion member 14 to reduce an effective distance between the semiconductor wafer 3 and the counter electrode 17, as shown in FIG. 2, uniformity of the thickness of the plated film is achieved to some extent. However, disturbance of electric fields is generated at ends of the immersion member 14. Accordingly, the thickness of the plated film is different between a central portion and an edge portion of the semiconductor wafer 3. In a case of an applied voltage of 0 V, the film thickness of the edge portion of the semiconductor wafer 3 is larger than that of the central portion of the semiconductor wafer 3. Some areas have a film thickness smaller than the film thickness of the central portion. Thus, the thickness of the plated film becomes uneven on the semiconductor wafer 3.
Further, the conventional plating apparatus has a wafer chuck (not shown in FIG. 2) and an annular member (not shown in FIG. 2) disposed on a lower surface of the semiconductor wafer 3 so as to face the frame 12. The frame 12 is clamped by the wafer chuck and the annular member to bring the packing portion 19 of the frame 12 into close contact with the semiconductor wafer 3. Thus, the electrolytic plating solution 9 is prevented from leaking out of the frame 12. Accordingly, an excessive force is applied to the peripheral portion of the semiconductor wafer 3. As a result, the seal member 13 is twisted at the time of clamping so as to inhibit a plated film formed on the semiconductor wafer 3 from having uniform thickness.